Main PIC18F4550 registers

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This page is the PIC18F4550 register catalog. If you have not read Basic architecture yet, start there: it explains SFR, GPR, WREG, STATUS, BSR, and PC with assembly examples.

Here you will see which registers exist, what each one does, and how to use them in code.

Data memory map

Data RAM mixes two kinds of locations:

Type	What it is	Examples
SFR	Control internal hardware	TRISB, LATB, INTCON, TMR0
GPR	Your program variables	counter, temp (declared with RES)

The PIC18F4550 organizes RAM into 16 banks (0 through 15). Register BSR selects the active bank. Many important SFRs sit in the access bank (ACCESS): you can read and write them without changing BSR.

Practical rule

In the lab you usually access TRISx, LATx, INTCON… without touching BSR. You only need it if MPASM requires a specific bank or you place GPRs in another bank.

CPU registers

These registers do not control a specific peripheral; they belong to the processor core. See Architecture for detailed examples; here is a quick reference:

Register	Function
WREG	8-bit accumulator. Source/destination for many instructions.
STATUS	Flags Z, C, DC, OV, N after arithmetic/logic operations.
BSR	Selects memory bank (0–15).
PC	Program counter. Points to the next instruction in Flash.
STKPTR / Stack	Pushes return addresses on CALL/RETURN and interrupts.

GPIO ports — TRISx, PORTx, LATx

Each port (A, B, C, D, E) has three SFRs with different roles:

Register	Read / write	Function
TRISx	Write	Pin direction: 1 = input, 0 = output
LATx	Write	Output value written to the latch (does not read the physical pin)
PORTx	Read	Actual pin level (useful for inputs and switches)

PIC18F4550 ports (40-pin PDIP):

Port	Pins	Course notes
A	RA0–RA5	Some analog pins
B	RB0–RB7	RB0 = INT0; RB4–RB7 = change interrupt
C	RC0–RC7	RC6/RC7 = UART (TX/RX)
D	RD0–RD7	LCD in lab practices
E	RE0–RE2	Analog inputs

Output — turn on LED on RB0

BCF     TRISB, 0    ; RB0 as output (TRISB bit 0 = 0)
BSF     LATB, 0     ; RB0 high → LED on

Input — read a button on RB3

BSF     TRISB, 3    ; RB3 as input (TRISB bit 3 = 1)
BTFSS   PORTB, 3    ; skip if RB3 is 1 (button released, depends on wiring)
GOTO    button_pressed   ; if RB3 = 0 → jump to destination
; button released (RB3 = 1) ...
GOTO    done_button
button_pressed:
        ; button pressed (RB3 = 0) ...
done_button:

PORT vs LAT — exam favorite

Write outputs with LATx (or BSF/BCF on LATx). Read inputs with PORTx. Writing to PORTx on a pin configured as analog input can cause odd behavior.

More examples in GPIO and the quick register guide.

Interrupt registers

Interrupts use several SFRs in sequence: enable → check flag → run ISR → clear flag → RETFIE.

Global control — INTCON, INTCON2, INTCON3

Register / bit	Function
INTCON.GIE	Global Interrupt Enable — master switch (1 = interrupts active)
INTCON.PEIE	Enables peripheral interrupts (timers, UART, ADC…)
INTCON.TMR0IF	Flag: Timer0 overflowed
INTCON2 / INTCON3	External INT0–INT2, RB port, priorities

Per peripheral — PIEx, PIRx, IPRx

Family	Purpose
PIE1, PIE2	Peripheral Interrupt Enable — enable the source (e.g. TMR0IE)
PIR1, PIR2	Peripheral Interrupt Request — flag that the event occurred
IPR1, IPR2	High/low priority for each source

Typical Timer0 flow:

        BSF     INTCON, GIE     ; turn on global switch
        BSF     INTCON, PEIE    ; allow peripheral interrupts
        BSF     PIE1, TMR0IE    ; enable Timer0 interrupt
        ; ... in the ISR ...
        BCF     INTCON, TMR0IF  ; clear flag before RETFIE
        RETFIE

Full detail in Interrupts.

Other SFRs you will see in the course

Summary by module — full table in Quick register guide:

Module	Key registers	Topic
Timer0	T0CON, TMR0L, TMR0H	Timer 0
Timer1/2	T1CON, T2CON, PR2	Timers
ADC	ADCON0, ADCON1, ADCON2, ADRESH/L	ADC
UART	TXSTA, RCSTA, SPBRG, TXREG, RCREG	UART
PWM/CCP	CCP1CON, CCPR1L, PR2	PWM and CCP
SPI/I2C	SSPSTAT, SSPCON1	SPI/I2C

GPR variables — declaring in assembly

        ; Variable section (e.g. after UDATA or at end of file):
counter     RES     1       ; define name + reserve 1 byte

        ; Usage:
INCF    counter, F
MOVF    counter, W

The name is your variable; an SFR has a fixed factory name.

Exam-style questions

What is the difference between reading PORTB and writing LATB?

PORTB reflects electrical pin levels (useful for inputs). LATB changes the latch output value without reading the physical pin.

What does BSR do?

It selects the RAM bank (0–15) when accessing an address. Many SFRs do not need it because they are in the ACCESS bank.

What is INTCON.GIE for?

It enables or disables all interrupts globally.

Interactive exam

PIC18 registers

Based on: Clase Tema 2 y 3 (1).pdf

0 of 0 answered

Which register defines if a pin is input or output?

PORTx LATx TRISx ADCON0

To write an output without reading the physical pin you should use...

PORTx LATx INTCON SSPSTAT

In TRISB, a bit set to 1 means the pin is...

Input Output Always analog Interrupt active

What does INTCON.GIE do?

Enables interrupts globally Clears the Timer0 flag Selects the memory bank Configures RB0 as output

PIR1 and PIR2 contain...

Flags that a peripheral interrupt occurred User GPR variables The program in Flash Only the return address

Which register selects the RAM memory bank?

WREG BSR LATB PC

To read the state of a button wired to RB3 you use...

LATB PORTB BSR WREG

An SFR like TRISB differs from a GPR because...

The SFR has a fixed name and controls hardware The GPR is always read-only The SFR exists only in Flash There is no difference

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